38 trillion operations per second 😱

[John_Scully]

My first mainframe had 0.8 MIPS (millions of instructions per second) and supported a whole enterprise. I remember my excitement when we upgraded to 1.1 MIPS… “way to go, Idaho”

Now an Apple iPad has a neural engine that does 38 trillion OPS

When to Expect New M4 MacBook Air, Mac Studio, and Mac Pro Models

[billybutcher]

@John_Scully

Now an Apple iPad has a neural engine that does 38 trillion OPS

I’m not sure how you really count “operations per second” for neural nets, presumably what is quoted is the raw compute speed for summing links and weights - but processing things through the net will be much slower than that.

After all our brain’s “clock speed” is at most a few Hz yet billions of neurons working together mean we can recognise (e.g.) the face of a friend we haven’t seen in years almost immediately.

In any case 38 giga instructions per second is actually not all that fast - modern x86 chips are superscalar (more than one instruction per clock), have multiple cores and multi GHz clock speeds - something like an i7 14700 - 5.4Ghz clock and 28 cores should be able to do more than 150 trillion integer operations per second, and floating point on top of that - in fact the floating point unit has been benchmarked at 155 GFLOPS over all.

Mind blowing when you think they got to the moon and back on a 16bit computer running at 2MHz

[John_Scully]

@billybutcher

(more than one instruction per clock)

Yes, we had CPUs with prefetch, pipelining and multiprocessors too, though they were the size of wardrobes. It used to amuse me that a branch instruction was all it took to derail them. Which makes me think again, despite all these super speeds how much of that raw power goes down the tube due to lousy ultra high level code

[billybutcher]

@John_Scully

Yes, we had CPUs with prefetch, pipelining and multiprocessors too, though they were the size of wardrobes.

Superscalar, pipelining and multiprocessing are all different - superscalar means being able to execute more than one instruction in a single cycle within the same core - say if one needs the integer ALU, one needs the FPU and one needs the address unit then all three can proceed in the same cycle.

Multiprocessing is multiple threads on separate cores.

@John_Scully

It used to amuse me that a branch instruction was all it took to derail them. Which makes me think again, despite all these super speeds how much of that raw power goes down the tube due to lousy ultra high level code

Not any more - between branch prediction (rather a large percentage of times a branch will go the same way as it did last time) and speculative execution (calculate what happens for both paths after a branch, discard the one that you didn’t need) modern CPUs rarely draw breath for a branch.

What *does* hurt though is cache misses.

Unfortunately all the clever stuff is sometimes done without regard to security which has lead to a lot of vulnerabilities simply because the massive complexity of modern CPUs can be used against them.

[ChrisMann]

I do enjoy technical gibberish.

[AIIy]

It’s all very good until faced with double authentication.

[hairbear]

@billybutcher

Unfortunately all the clever stuff is sometimes done without regard to security which has lead to a lot of vulnerabilities simply because the massive complexity of modern CPUs can be used against them.

‘Sinkclose’ Flaw in Hundreds of Millions of AMD Chips Allows Deep, Virtually...

[Porridge]

I thought this was going to be about the NHS under Sir Keir

[AIIy]

Funnily enough I thought it was a past promise of Boris Johnson’s but then i thought “Nah, that figure isn’t fantastic enough for BoJo.”

[Susannah]

‘Catch of the week’: fisher lands Lego shark lost at sea for 27 years

[John_Scully]

Great read. Of course I blame Windoz If it wasn’t leaky as hell nobody could ever get to that machine level